Mechanical and chemical-mechanical planarizing processes (collectively “CMP”) remove material from the surface of semiconductor wafers, field emission displays or other microelectronic workpieces in the production of microelectronic devices and other products. FIG. 1 schematically illustrates a CMP machine 10 with a platen 20, a carrier assembly 30, and a planarizing pad 40. The CMP machine 10 may also have an under-pad 25 attached to an upper surface 22 of the platen 20 and the lower surface of the planarizing pad 40. A drive assembly 26 rotates the platen 20 (indicated by arrow F), or it reciprocates the platen 20 back and forth (indicated by arrow G). Since the planarizing pad 40 is attached to the under-pad 25, the planarizing pad 40 moves with the platen 20 during planarization.
The carrier assembly 30 has a head 32 to which a microelectronic workpiece 12 may be attached, or the microelectronic workpiece 12 may be attached to a resilient pad 34 in the head 32. The head 32 may be a free-floating wafer carrier, or an actuator assembly 36 may be coupled to the head 32 to impart axial and/or rotational motion to the workpiece 12 (indicated by arrows H and I, respectively).
The planarizing pad 40 and a planarizing solution 44 on the pad 40 collectively define a planarizing medium that mechanically and/or chemically removes material from the surface of the workpiece 12. The planarizing pad 40 can be a soft pad or a hard pad. The planarizing pad 40 can also be a fixed-abrasive planarizing pad in which abrasive particles are fixedly bonded to a suspension material. In fixed-abrasive applications, the planarizing solution 44 is typically a non-abrasive “clean solution” without abrasive particles. In other applications, the planarizing pad 40 can be a non-abrasive pad composed of a polymeric material (e.g., polyurethane), resin, felt or other suitable materials. The planarizing solutions 44 used with the non-abrasive planarizing pads are typically abrasive slurries with abrasive particles suspended in a liquid. The planarizing solution may be replenished from a planarizing solution supply 46.
If chemical-mechanical planarization (as opposed to plain mechanical planarization) is employed, the planarizing solution 44 will typically chemically interact with the surface of the workpiece 12 to speed up or otherwise optimize the removal of material from the surface of the workpiece. Increasingly, microelectronic device circuitry (i.e., trenches, vias, and the like) is being formed from copper. When planarizing a copper layer using CMP, the planarizing solution 44 is typically neutral to acidic and includes an oxidizer (e.g., hydrogen peroxide) to oxidize the copper and increase the copper removal rate. One particular slurry useful for polishing a copper layer is disclosed in International Publication Number WO 02/18099, the entirety of which is incorporated herein by reference.
To planarize the workpiece 12 with the CMP machine 10, the carrier assembly 30 presses the workpiece 12 face-downward against the polishing medium. More specifically, the carrier assembly 30 generally presses the workpiece 12 against the planarizing solution 44 on a planarizing surface 42 of the planarizing pad 40, and the platen 20 and/or the carrier assembly 30 move to rub the workpiece 12 against the planarizing surface 42. As the workpiece 12 rubs against the planarizing surface 42, material is removed from the face of the workpiece 12.
CMP processes should consistently and accurately produce a uniformly planar surface on the workpiece to enable precise fabrication of circuits and photo-patterns. During the construction of transistors, contacts, interconnects and other features, many workpieces develop large “step heights” that create highly topographic surfaces. Such highly topographical surfaces can impair the accuracy of subsequent photolithographic procedures and other processes that are necessary for forming sub-micron features. For example, it is difficult to accurately focus photo patterns to meet tolerances approaching 0.1 micron on topographic surfaces because sub-micron photolithographic equipment generally has a very limited depth of field. Thus, CMP processes are often used to transform a topographical surface into a highly uniform, planar surface at various stages of manufacturing microelectronic devices on a workpiece.
Chalcogenide materials can be used as electrically writable and erasable phase change materials, i.e., they can be electrically switched between generally amorphous and generally crystalline states with different resistive properties, or between different resistive states while in crystalline form. Such electrically writable and erasable materials are useful in a number of applications, including non-volatile or “state-changeable” memory devices such as EEPROMs and FLASH memory devices. Chalcogenide alloys have also garnered much attention as possible elements of optical memory devices. Certain aspects of manufacturing devices including chalcogenide materials are disclosed in U.S. Pat. No. 5,789,277 (Zahorik et al.), the entirety of which is incorporated herein by reference. Germanium-tellurium (Ge—Te) and germanium-tellurium-antimony (Ge—Te—Sb) are, perhaps, the most common chalcogenide-metal alloys in current EEPROM and Flash applications. Increasingly, though, memory device manufacturers are investigating other chalcogenides as possible candidates for both electrically writable and erasable materials and optical memory applications.